1. Technical Field
A differential amplifier control circuit is disclosed, wherein a signal indicating that all banks are not activated is provided to a differential amplifier in order not to operate the differential amplifier.
2. Description of Related Art
In JEDEC (Joint Electron Device Engineering Council) specifications, ICC2N indicates a precharge non power down standby current when all b anks i dle, a c lock enable signal CKE is at a HIGH level, a chip select bar signal CSB is at a HIGH level, and tck=tckmin. That is, even in the ICC2N situation, a clock operates in an internal circuit of a semiconductor memory device.
FIG. 1 is a block diagram illustrating the construction of a differential amplifier control circuit in the prior art. Referring to FIG. 1, the differential amplifier control circuit 100 includes an input buffer 110, a command decoder 120, a n address buffer 130, a m ode register 140, and a differential amplifier 150.
The input buffer 110 buffers a clock signal CLK, a clock bar signal CLKB, a clock enable signal CKE, a chip select bar signal CSB, a row address strobe bar signal RASB, a column address strobe bar signal CASB, and a write enable bar signal WEB, and generates an internal clock signal ICLK and other internal signals. The command decoder 120 decodes the output signals received from the input buffer 110. The address buffer 130 buffers a row address A<i> and bank addresses BA0, BA1. The mode register 140 generates bank active signals BK0 to BK3 for activating banks 0 to 3 (160) by using the output signal of the command decoder 120 and the output signal of the address buffer 130. The differential amplifier controller 150 inputs data DT and the internal clock signal ICLK.
The differential amplifier 150 is enabled according to an internal clock signal ICLK generated from the input buffer 110. This differential amplifier 150 continues to operate while the internal clock signal ICLK is active even in the ICC2N situation. Thus, there is a problem in that current of about several hundred μA is consumed.
That is, in the ICC2N situation, all the banks are idle, but the differential amplifier 150 does not recognize the state where all the banks are idle. Therefore, the differential amplifier 150 continues to operate while the internal clock signal ICLK is active, thereby consuming the current.